1. Field of the Invention
The invention relates to an electronic component.
2. Description of the Background Art
An electronic component of this type is disclosed in JP2004241579 A. This electronic component comprises a semiconductor chip, mounted on a support platform of a lead frame, and a capacitor formed as an SMD component, which is arranged between the support platform, used as the ground terminal, and a connecting lead for supplying an operating voltage. To form a housing, the semiconductor chip and the SMD component as well are molded with a molding compound.
The mounting of such an SMD component on the lead frame occurs by means of an adhesive bond with an epoxy base, whereby an electrically conducting connection is produced by means of additives. It is a disadvantage here, however, that bleeding (epoxy bleeding) of the adhesive occurs, so that as a result the adhesive can spread uncontrolled to the bond fingers and bondability is therefore no longer assured.
To resolve this problem, DE 197 14 385 A1 proposes a method for limiting the bleeding of the adhesive, particularly during mounting of electronic components in a COB (chip on board) design, according to which by a method-related application of an obstacle, a self-contained barrier is formed by the use of suitable lacquers, e.g., of a solder resist. In this prior-art method, this barrier is placed as a closed ring in the gap between the mounting surface of a semiconductor chip and the associated bond pad.
The disadvantage of this prior-art method is not only the additional cost of producing an appropriate solder resist mask but also the additional process steps. Depending on the type of solder resist used, after application to the chip carrier it must be cured or dried, exposed to light, and developed.